Hardware Design for Quadrature Phase Detection Algorithm in ECVT

Imamul Muttakin, Arbai Yusuf, Rohmadi ., Wahyu Widada, Warsito P. Taruno

Abstract


Core processing for calculating phase andamplitude of the detected signal was built on FPGA (Field-Programmable Gate-Array) platform. Phase shift demodulationalgorithm employs IP core provided by Xilinx FPGA. Directdigital synthesizer (DDS), multiplier, accumulator, and CORDIC(coordinate rotation digital computer) modules were used asexcitation-reference signal generator, signal multiplication,accumulation, and conversion to polar coordinate in order toconduct trigonometric operation respectively. Hardware designwas emulated on MATLAB-Xilinx System Generator to observeits performance. Phase detection range 0-114.58o and meanabsolute error 0.58o have been achieved. Data processing ratesolely at digital signal stage was approximately 100data/s suitablefor 32-channel ECVT (electrical capacitance volumetomography) system.

Keywords


quadrature demodulation; phase detection; system generator; FPGA; ECVT

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