Analysis of the Transformerless Boost Dc-dc Converter with High Voltage Gain in Different Operating Modes and Critical Inductance Calculations

In the high voltage dc-dc boost converters, the energy transmission modes are divided into continuous conduction mode (CCM) and discontinuous conduction mode (DCM). In addition, these modes are also divided into two different modes: complete inductor supply mode (CISM) and incomplete inductor supply mode (IISM). In this paper, the operation of the boost dc-dc converter with high voltage gain is analyzed. Firstly, the energy transmission process between CCM and DCM is analyzed. Then, this process is investigated between IISM and CISM. Moreover, the critical inductance between CCM and DCM in addition to CISM and IISM is calculated. Finally, in order to verify the presented theoretical issues, the simulation results in EMTDC/PSCAD software program are used.


Introduction
DC-DC converters are able to convert the dc input voltage level from a specific level to a desired output voltage level. The dc-dc converters could be used where the variable dc voltage sources are required. These converters are used in several applications such as distributed generation sources, power factor modification, control of the electrical machines and portable devices. The high voltage gain dc-dc converters are also used in fuel cell energy converter systems, photovoltaic energy converter systems and backup battery systems in UPS [1][2][3][4][5][6]. The boost dc-dc converter is a kind of converters that are suitable for approaching higher voltage ratings. The power switches, rectification diodes, equivalent series resistance of capacitors and inductances limit the high voltage gain. Up to now, different boost dc-dc converters have been presented in literature such as fly back ZCS-PWM [7]. The high voltage stress, which is made by the inductance leakage flux, is the main disadvantage of this converter. The transformerless boost converter is the other structure of the dc-dc converters [8]. The low size and weight are two main advantages of this converter in comparison with the converters including transformer. This converter consists of the simple structure but it includes of several disadvantages. In this converter, when the switches are turned on three power devices conduct while the switches are turned off two of power devices conduct. The high voltage stress of power switches is the other disadvantages of this converter that is equal to the output voltage.
A new converter that has been presented in [9] consists of simpler structure and lower cost. In this converter, when the switches are turned on two power devices conduct while the switches are turned off a power device conduct. In addition, the switching losses and voltage stress on the power switches are lower than the output voltage. Moreover, the amount of the current stress is same the previous structure. The voltage stress on active switches are selected based on the value of the nominal voltage and small resistance level when are turned on. In the high voltage boost dc-dc converters, the energy transmission modes are divided into CCM and DCM. The CCM is divided into CISM and IISM. In CISM, the minimum value of the inductance current is higher than the output current. In other word, the dc source not only supplies the output current but also provides the required current for charging the capacitor. In IISM, the 137 minimum current value of each inductance is lower than the load current. There is no CISM in DCM and the converter is only operates in IISM.
In this paper, first the energy transmission process in CCM and DCM of the presented topology in [9] is analyzed and then this process between CISM and IISM is investigated. In addition, the voltage gain is calculated in CCM and DCM. Then, the value critical inductance between CCM and DCM in addition to CISM and IISM is calculated. Finally, the accuracy of the theoretical issues is reconfirmed through the simulation results. Figure 1 shows the high voltage boost dc-dc converter that has been presented in [9]. The converter that is shown in Figure 1 consists of two different CCM and DCM as same as conventional dc-dc converters. The operating modes in a dc-dc converter could be divided based on the values of the input voltage, duty cycle and inductance of the converter. In this paper, the operating modes of the converter are determined based on the value of the inductance. By comparing the load current and the minimum current of the inductances 1 L and 2 L , the CCM is divided into CISM and IISM modes. The differences between these two modes are determined by the value of the critical inductance.

1). Complete Inductor Supply Mode (CISM)
In CISM, the minimum value of each inductor current is higher than the value of the load current. The energy transmission process is analyzed into two time intervals. The first one is the time that the switch is turned on ( on T ) and the second one while the switch is turned off ( off T ).
In the time interval of on T , by turning on the switches 1 S and 2 S , the diodes of 0 D and 1 D are in reveres and direct connection, respectively. Figure 2(a) indicates this state. It is pointed out that the values of the inductances are considered equal. As shown in Figure 2(a), the voltages of the inductances 1 L and 2 L are equal to each other that are equal to the input voltage. In addition, by turning on the switches, the current of the inductances 1 L and 2 L are linearly increased to their maximum values that are indicated in Figure 3(a). In this time interval, according to the state of 0 D , the capacitor 0 C supplies the load energy lonely that leads to reduce the voltage of the capacitor from maximum to its minimum value linearly. In addition, because of the parallel connection of the capacitor 1 C and input voltage ( ) i V , this capacitor is charged to i V . In the time interval of off T , by turning off the switches 1 S and 2 S , the diodes 0 D and 1 D are in direct and reveres connection, respectively. Figure 2(b) indicates this state. As shown in Figure 2(b), the inductances 1 L and 2 L are connected in series and so their current are equal to each other. Therefore, the current of the inductances are considered In this time interval, the inductance supplies the load and capacitor and so the capacitor is charged. Therefore, by 138 discharging the inductance, its current is decreased from LP I to LV I that is shown in Figure  3(a). In addition, the value of the capacitor current is equal to

Bulletin of EEI
therefore, the capacitor current is also reduced by decreasing the inductance current. This reduction of the capacitor current is continued until 3 t . In the time interval of 1 3 ( ) t t  , the value of the capacitor voltage is increased from cv V to cp V that is equal to its maximum value. In addition, the voltage of the capacitor 1 C is constant and equal to i V because the capacitance value of 1 C is considered high enough.

2). Incomplete Inductor Supply Mode (IISM)
In IISM, the minimum value of each inductor current is lower than the value of the load current. The analysis of this operating mode is as same as CISM and is divided into two time interval of on T and off T . The waveforms of the inductances voltage, inductances current, capacitor current and output voltage in IISM are shown in Figure 3(b). The analysis of the converter in the time interval of on T is as same as CISM by the differences that the primary value of the inductance current and output voltage in IISM is differ from CISM. The energy transmission process in the time interval of off T is divided into two states. capacitor current of 0 C is also reduced. At 2 t , the capacitor current of 0 C will be equal to zero when the inductance current is equal to load current. Second state: This state consists of the time interval of 2 3 ( ) t t  . In IISM mode and in the time interval of 2 3 ( ) t t  , by decreasing the inductance current, the capacitor current of 0 C is also reduced based on the equation of until 3 t that its value will be equal to o LV I I  because the minimum value of the inductance current is lower than the load current. This state is shown in Figure 2(c). As shown in Figure 2(c) and in the time interval of 2 3 ( ) t t  , the capacitor voltage of 0 C is reduced by discharging the energy of the capacitor.

Energy Transmission Process in DCM
In DCM, the value of the inductance current is equal to zero in a time interval and is apposite of zero in another time interval. Therefore, the value of the inductance current is lower than the value of the load current. As a result, there is no CISM in DCM and the converter operates only in IISM. In DCM, the waveforms of the inductances voltage, inductances current, capacitor current of 0 C and output voltage are shown in . This state is indicated in Figure  2(b). As shown in this figure, the inductance supplies the load current in addition to charge the capacitor, therefore, by discharging the inductances, their current are reduced and so the capacitors current are also decreased based on the equation . In 2 t , the capacitor current will be equal to zero when the inductance current is equal to the load current. At this time interval, the capacitor voltage is also increased because it is charged. and by discharging the capacitor 0 C , its voltage is linearly reduced.

Voltage Gain Calculation in CCM and DCM
The voltage gain is one of the most important parameters in analysis of the dc-dc converters that indicates the relation between output and input voltage. The voltage gain of the converter is written based on the duty cycle of the converter and other parameters of the converter. For the converter shown in Figure 1, the value of the inductances 1 L and 2 L are considered equally and are shown by L . The duty cycle of the converter is written as follows: It is resulted from above equation that: ( 2 )

Voltage Gain in CCM
The voltage gain in CCM is obtained from the voltage balance law of the inductance as follows: According to Figure 2(a) and based on the Kirchhoff voltage law, the voltage magnitude of each inductance in the time interval of on T is equal to: In this time interval, because of the same value of the inductances it could be written: In the time interval of off T as shown on Figure 2(b), the equation (5) is valid because the series connection of the inductances. By using the Kirchhoff voltage law in the shown circuit in Figure  2(b) and based on the magnitude of the capacitor voltage that is equal to i V , the below equation is written: Based on equation (1) and by considering off on T T T   , the (3) is rewritten as follows: By replacing (4) and (6) into (7), the voltage gain in CCM is calculated a follows:

Voltage Gain in DCM
The voltage gain in DCM is obtained from the current balance law of the capacitor as follows: In (10), the LP I is the maximum value of the inductance current and the primary value of the inductance current in 1 3 ( ) t t  . According to Figure 3, the current value of the capacitor 0 C in the time interval of 2 3 ( ) and based on (1), (9) could be rewritten as follows: Therefore, the maximum value of the inductances current is calculated as follows: when f is the switching frequency.
According to the facts that the average value of the inductance voltage in a switching period is equal to zero, in DCM, the value of 2 D is calculated as follows: In DCM, the voltage gain is equal to:

Calculation of Critical Inductance
It is pointed out that the operating modes of the converter are determined based on the value of the inductances current and this value is depends on the value of the inductances. Therefore, in order to calculate the critical inductance between different operating modes, the equations of the inductances current have to be calculated.

Critical Inductance Calculation between CCM and DCM
The minimum value of the inductance current between CCM and DCM is equal to zero. Therefore, the value of the critical inductance between CCM and DCM is obtained by calculation the value of LV I versus the inductance while it is equalized to zero. In the time interval the inductance current is obtained as follows: ( 1 5 ) By replacing the margin conditions in (15), it is resulted: The value of the LP I is obtained based on the capacitor current balance law as follows: is the current of each inductance in the time interval of off T . By considering 0 1  t as the new time offset and by solving (18), the value of the inductance current in the time interval of off T is calculated as follows: ( 1 9 ) By replacing (19) into (18) and (17), the maximum and the minimum value of the inductance current are obtained as follows: ( 2 1 ) The value of the critical inductance is obtained when 0 LV I  as follows: The converter is in CCM when C L L  and is in DCM while C L L  .

Calculation of Critical Inductance between CISM and IISM
The minimum value of the inductance current between CISM and IISM is equal to the load current. Therefore, the critical inductance between CISM and IISM are equal to: The converter is in CISM when . Therefore: By . Therefore, the operating modes of converter could be divided into three different modes. These divisions are shown in   , the converter will be in IISM, which is indicated by in Figure 5(b). For the states that and based on considering the specific value of L R and i V , the converter is in CISM when K L L  and will be in IISM while K L L  , which is indicated by 2 K L in Figure 5(b).

Simulation Results
The correct performance of the presented high voltage dc-dc converter that is shown in Figure 1 is verified through simulation results in different operating modes. The simulation results are obtained by EMTDC/PSCAD software program. The values of the main parameters of the converter are summarized in Table I. Considering (25) to (28) and Table I, the values of the inductances and capacitance are obtained as shown in Table II.  . Figure 6 shows the output voltage and inductance current waveforms versus different values of inductances. As shown in Figure 6 (Figure 6(b)). When the value of the inductance is selected , the converter is in CISM-CCM because the selected value is higher than 86.4 K L H   (Figure 6(c)). As it is obvious from Figure 6, the simulation results reconfirm the shown waveforms in Figure 3.

Conclusion
In this paper, the transformerless boost dc-dc converter with high voltage gain that is presented in [9] is analyzed. The mathematical equations for different operating modes are calculated. The different operating modes in dc-dc converter are determined by the value of the inductance. By comparing the minimum value of inductance current and load current the CCM is divided into two modes CISM and IISM that the border of these two modes are determined by the value of the critical inductance. There is no CISM in DCM and the converter is only operates in IISM. In other words, the operating modes of the high voltage boost dc-dc converter are divided into three operating modes: CISM-CCM, IISM-CCM, and IISM-DCM. In CISM, the minimum current value of each inductance is higher than the load current and in IISM the minimum current value of each inductance is lower than the load current. For the high voltage boost dc-dc converter in different operating modes, the values of the input voltage and load resistance could be changed between two minimum and maximum values and the value of the critical inductances is depends on the value of the input voltage and load current. Finally, the accuracy performance of the theoretical issues is reconfirmed by the simulation results in EMTDC/PSCAD software program.